The present invention relates to a manufacturing method of a semiconductor device, in particular, a manufacturing method of a semiconductor device having a step of cutting a semiconductor wafer.
A semiconductor device is typically manufactured by a front-end process in which various wafer-level steps are performed and a back-end process including a scribing step.
A semiconductor wafer formed in the front-end process has a plurality of semiconductor chip regions which will respectively become semiconductor chips later and scribe regions located between any two of these semiconductor chip regions. The scribe regions are regions equipped for scribing (dicing) and at the same time, regions in which alignment marks for lithography and various monitors for process control (PCMs: process control monitors).
For example, in Japanese Patent Laid-Open No. 2007-49067 (Patent Document 1), a semiconductor wafer includes a first scribe region formed along a first direction. The first scribe region is divided into a first region and a second region by a virtual line parallel to the first direction. The first region has an alignment mark (alignment mark for lithography) region and the second region has a test mark (PCM) region.
In the back-end process, the semiconductor chip regions are subjected to various tests by using PCMs. A plurality of semiconductor regions are then cut into individual semiconductor chips by scribing. If the PCMs are not cut off in this step, they remain on the semiconductor chip. Confidential data on this semiconductor device and manufacturing method thereof are sometimes leaked from the remaining PCMs. A technology for preventing such information leakage is therefore proposed.
For example, a semiconductor wafer proposed in Japanese Patent Laid-Open No. Hei 10(1998)-256324 (Patent Document 2) is characterized in that an internal circuit of ROM (read only memory) is tested via a test pad formed on a scribe line and the test pad is broken when the wafer is cut along the scribe line.
[Patent Documents]
    [Patent Document 1] Japanese Patent Laid-Open No. 2007-49067    [Patent Document 2] Japanese Patent Laid-Open No. Hei 10(1998)-256324